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Creators/Authors contains: "Safranski, Christopher"

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  1. Abstract We review two magnetic tunnel junction (MTJ) approaches for compact, low-power, CMOS-integrated true random number generation (TRNG). The first employs passive-read, easy-plane superparamagnetic MTJs (sMTJs) that generate thermal-fluctuation-driven bitstreams at 0.5–1 Gb s−1per device. The second uses MTJs with magnetically stable free layers, operated with stochastic write pulses to achieve switching probabilities of about 0.5 (i.e. write error rates of 0.5 ), achieving 0.1  Gb s−1per device; we refer to these as stochastic-write MTJs (SW-MTJs). Randomness from both approaches has been validated using the NIST SP 800-22r1a test suites. sMTJ approach uses a read-only cell with low power and can be compatible with most advanced CMOS nodes, while SW-MTJs leverage standard CMOS MTJ process flows, enabling co-integration with embedded spin-transfer torque magnetic random access memory. Both approaches can achieve deep sub-0.01 µm2MTJ footprints and offer orders-of-magnitude better energy efficiency than CPU/GPU-based generators, enabling placement near logic for high-throughput random bitstreams for probabilistic computing, statistical modeling, and cryptography. In terms of performance, sMTJs generally suit applications requiring very high data-rate random bits near logic processors, such as probabilistic computing or large-scale statistical modeling. Whereas SW-MTJs are attractive option for edge-oriented microcontrollers, providing entropy sources for computing or cryptographic enhancement. We highlight the strengths, limitations, and integration challenges of each approach, emphasizing the need to reduce device-to-device variability in sMTJs—particularly by mitigating magnetostriction-induced in-plane anisotropy—and to improve temporal stability in SW-MTJs for robust, large-scale deployment. 
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    Free, publicly-accessible full text available December 24, 2026
  2. Abstract Spin Hall oscillators (SHOs) based on bilayers of a ferromagnet (FM) and a non-magnetic heavy metal (HM) are electrically tunable nanoscale microwave signal generators. Achieving high output power in SHOs requires driving large-amplitude magnetization dynamics by a direct spin Hall current. Here we present an SHO engineered to have easy-plane magnetic anisotropy oriented normal to the bilayer plane, enabling large-amplitude easy-plane dynamics driven by spin Hall current. Our experiments and micromagnetic simulations demonstrate that the easy-plane anisotropy can be achieved by tuning the magnetic shape anisotropy and perpendicular magnetic anisotropy in a nanowire SHO, leading to a significant enhancement of the generated microwave power. The easy-plane SHO experimentally demonstrated here is an ideal candidate for realization of a spintronic spiking neuron. Our results provide an approach to design of high-power SHOs for wireless communications, neuromorphic computing, and microwave assisted magnetic recording. 
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  3. Spin currents are used to write information in magnetic random access memory (MRAM) devices by switching the magnetization direction of one of the ferromagnetic electrodes of a magnetic tunnel junction (MTJ) nanopillar. Different physical mechanisms of conversion of charge current to spin current can be used in two-terminal and three-terminal device geometries. In two-terminal devices, charge-to-spin conversion occurs by spin filtering in the MTJ's ferromagnetic electrodes and present day MRAM devices operate near the theoretically expected maximum charge-to-spin conversion efficiency. In three-terminal devices, spin–orbit interactions in a channel material can also be used to generate large spin currents. In this Perspective article, we discuss charge-to-spin conversion processes that can satisfy the requirements of MRAM technology. We emphasize the need to develop channel materials with larger charge-to-spin conversion efficiency—that can equal or exceed that produced by spin filtering—and spin currents with a spin polarization component perpendicular to the channel interface. This would enable high-performance devices based on sub-20 nm diameter perpendicularly magnetized MTJ nanopillars without need of a symmetry breaking field. We also discuss MRAM characteristics essential for CMOS integration. Finally, we identify critical research needs for charge-to-spin conversion measurements and metrics that can be used to optimize device channel materials and interface properties prior to full MTJ nanopillar device fabrication and characterization. 
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